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Analysis of 6 Reasons for MOSFET Failure


It is often encountered that the MOSFET on the power supply board cannot work normally. First of all, it is necessary to correctly test to determine whether the MOSFET fails. Then the key is to find the reason behind the failure and avoid making the same mistake again. This article has sorted out several common causes of MOSFET failure. and specific measures on how to avoid failure.


1. Avalanche failure (voltage failure)


That is to say, the BVdss voltage between the drain and the source exceeds the rated voltage of the MOSFET, and exceeds a certain capacity, causing the MOSFET to fail.


In simple terms, the MOSFET is a failure mode on the power board due to the superposition of system voltages such as bus voltage, transformer reflected voltage, leakage inductance spike voltage, etc. between the MOSFET drain and source. In short, it is a common failure mode caused by the voltage of the MOSFET drain to source exceeding its specified voltage value and reaching a certain energy limit.


Precautions for Avalanche Failure:


The avalanche failure is ultimately a voltage failure, so we focus on the voltage to prevent it. Specifically, you can refer to the following ways to deal with it:


1. Reasonable derating use. At present, the derating in the industry generally selects 80%-95% derating, and the specific situation is selected according to the company's warranty terms and circuit concerns;


2. Reasonable transformer reflected voltage;


3. Reasonable RCD and TVS absorption circuit design;


4. Use thick and short layout structures as far as possible for high-current wiring to minimize wiring parasitic inductance;


5. Select a reasonable gate resistance Rg;


6. In high-power power supplies, RC damping or Zener diodes can be appropriately added for absorption as needed.


2. SOA failure (current failure)


SOA failure refers to the damage mode caused by the abnormal high current and voltage superimposed on the MOSFET during the operation of the power supply, resulting in instantaneous local heating. Or the chip, the heat sink and the package cannot reach thermal balance in time, resulting in heat accumulation, and the continuous heat generation causes the temperature to exceed the limit of the oxide layer, resulting in thermal breakdown mode.


1. Limited by the maximum rated current and pulse current;


2. Limited by RDSON at the maximum junction temperature;


3. Limited by the maximum power dissipation of the device;


4. Limited by the maximum single pulse current;


5. Breakdown voltage BVDSS restricted area.


As long as the MOSFET on our power supply is guaranteed to be within the range of the above restricted area, the power failure problem caused by the MOSFET can be effectively avoided.


Preventive measures for SOA failure:


1. Make sure that under the worst condition, all power limit conditions of MOSFET are within SOA limit line;


2. The OCP function must be precise and meticulous.


When designing the OCP point, most engineers may take a current margin of 1.1-1.5 times, and then start debugging the RSENSE resistor according to the protection voltage of the IC, such as 0.7V. Some experienced people will take into account the detection delay time, the actual impact of CISS on OCP. But there is a more noteworthy parameter at this time, that is the Td (off) of the MOSFET.


3. Body diode failure


In bridge, LLC and other topologies that use the body diode for freewheeling, the failure is caused by the destruction of the body diode.


In different topologies and circuits, MOSFETs have different roles. For example, in LLCs, the speed of the body diode is also an important factor in the reliability of MOSFETs. Body diode failure between drain and source is difficult to distinguish from drain-source voltage failure because the diode itself is a parasitic parameter. Although it is difficult to distinguish the cause of the body after failure, the solutions to prevent voltage and diode failures are quite different, and they are mainly analyzed in conjunction with their own circuits.


Body Diode Failure Prevention Measures:


In fact, D and S of the MOS tube are essentially symmetrical structures, just two contacts of the channel. However, since the opening and closing of the channel involves the electric field between the gate and the substrate, it is necessary to give the substrate a certain potential. And because the MOS tube has only 3 pins, the substrate needs to be connected to one of the other two pins. Then the pin connected to the substrate is S, and the pin not connected to the substrate is D. When we apply it, the potential of S is often stable. In integrated circuits, such as CMOS or analog switches, since the chip itself has power pins, the substrates of those MOS tubes are not connected to the pins, but are directly connected to the VCC or VEE of the power supply. There is no difference between D and S at this time.


4. Resonance failure


Gate parasitic oscillation that occurs when power MOSFETs are connected in parallel without inserting a gate resistor. This parasitic oscillation occurs on the resonant circuit formed by the gate-drain capacitance Cgd (Crss) and the gate pin inductance Lg when the drain-source voltage is repeatedly turned on and off at high speed. When the resonance condition (ωL=1/ωC) is established, a vibration voltage much larger than the driving voltage Vgs(in) is applied between the gate and the source, and the gate is destroyed due to exceeding the rated voltage between the gate and the source, or The oscillation voltage when the drain-source voltage is turned on and off is superimposed on the gate-drain capacitance Cgd and Vgs waveforms, causing forward feedback, which may cause oscillation destruction due to malfunction.


Resonance Failure Prevention Measures:


Resistors dampen oscillations because of damping. But connecting a small resistor in series to the gate does not solve the problem of oscillation damping. The main reason is the impedance matching of the drive circuit and the reason for adjusting the switching time of the power tube.


5. Electrostatic failure


The basic physical characteristics of static electricity are: there is a force of attraction or repulsion; there is an electric field, and there is a potential difference with the earth; a discharge current is generated. These three situations can have the following effects on electronic components:


1. The components absorb dust, change the impedance between the lines, and affect the function and life of the components;


2. Damage to the insulating layer and conductor of the element due to electric field or current, so that the element cannot work (completely destroyed);


3. Due to instantaneous electric field soft breakdown or current overheating, the component is injured, although it can still work, but its life is damaged.


Preventive measures for electrostatic failure:


The protection diode at the input end of the MOS circuit generally has a current tolerance of 1mA when it is turned on. When excessive transient input current (over 10mA) may occur, an input protection resistor should be connected in series. Since no protection resistor was added in the initial design, this is also the reason why the MOS tube may break down, and this failure should be prevented by replacing a MOS tube with a protection resistor inside. In addition, because the instantaneous energy absorbed by the protection circuit is limited, too large an instantaneous signal and too high electrostatic voltage will make the protection circuit useless. Therefore, the electric soldering iron must be grounded reliably during soldering to prevent leakage of electricity from breaking down the input end of the device. In general use, the residual heat of the electric soldering iron can be used for soldering after the power is turned off, and the grounding pins of the soldering iron can be soldered first.


6. Gate voltage failure


There are three main reasons for the abnormal high voltage source of the gate:


1. Static electricity during production, transportation and assembly.


2. The high-voltage resonance generated by the parasitic parameters of the device and circuit when the power system is working.


3. During the high voltage shock, the high voltage is transmitted to the grid through Ggd (in the lightning test, the failure caused by this reason is more common).


As for the PCB pollution level, electrical clearance, and other phenomena that enter the gate after high voltage breakdown of the IC, I will not explain too much.


Preventive measures for gate voltage failure:


 Overvoltage protection between gate and source, that is, if the impedance between the gate and source is too high, the sudden change of the voltage between the drain and the source will be coupled to the gate through the inter-electrode capacitance, resulting in a relatively high UGS voltage overshoot, which will cause the gate The polar oxide layer is permanently damaged, and if the UGS transient voltage is in the positive direction, it will also lead to false turn-on of the device. To this end, the impedance of the gate drive circuit should be appropriately reduced, and a damping resistor or a voltage regulator with a voltage regulation value of about 20V should be connected in parallel between the gate and source. Special care should be taken to prevent open gate operation.


The second is the overvoltage protection between the drains. If there is an inductive load in the circuit, a sudden change in drain current (di/dt) when the device is turned off can cause a drain voltage overshoot that is much higher than the supply voltage, resulting in device damage. Protection measures such as Zener tube clamp, RC clamp or RC suppression circuit should be taken.


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